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( DataSheet : www..com )
PIC18F6625/6721/8625/8721
64/80-Pin High-Performance, 1-Mbit Enhanced Flash Microcontrollers with A/D and nanoWatt Technology
Power Managed Modes:
* * * * * * * * Run: CPU on, peripherals on Idle: CPU off, peripherals on Sleep: CPU off, peripherals off Idle mode currents down to 5.8 A typical Sleep current down to 0.1 A typical Timer1 Oscillator: 1.8 A, 32 kHz, 2V Watchdog Timer: 2.1 A Two-Speed Oscillator Start-up
Peripheral Highlights (Continued):
* Three Enhanced Capture/Compare/PWM (ECCP) modules: - One, two or four PWM outputs - Selectable polarity - Programmable dead-time - Auto-Shutdown and Auto-Restart * Two Master Synchronous Serial Port (MSSP) modules supporting 3-wire SPITM (all 4 modes) and I2CTM Master and Slave modes * Two Enhanced Addressable USART modules: - Supports RS-485, RS-232 and LIN 1.2 - RS-232 operation using internal oscillator block (no external crystal required) - Auto-wake-up on Start bit - Auto-baud detect * 10-bit, up to 16-channel Analog-to-Digital Converter module (A/D) - Auto-acquisition capability - Conversion available during Sleep * Dual analog comparators with input multiplexing
Flexible Oscillator Structure:
* Four Crystal modes, up to 40 MHz * 4X Phase Lock Loop (available for crystal and internal oscillators) * Two External RC modes, up to 4 MHz * Two External Clock modes, up to 40 MHz * Internal oscillator block: - 8 user selectable frequencies, from 31 kHz to 8 MHz - Provides a complete range of clock speeds from 31 kHz to 32 MHz when used with PLL - User tunable to compensate for frequency drift * Secondary oscillator using Timer1 @ 32 kHz * Fail-Safe Clock Monitor: - Allows for safe shutdown if peripheral clock stops
Special Microcontroller Features:
* C compiler optimized architecture: - Optional extended instruction set designed to optimize re-entrant code * 100,000 erase/write cycle Enhanced Flash program memory typical * 1,000,000 erase/write cycle Data EEPROM memory typical * Flash/Data EEPROM Retention: 100 years typical * Self-programmable under software control * Priority levels for interrupts * 8 X 8 Single Cycle Hardware Multiplier * Extended Watchdog Timer (WDT): - Programmable period from 4 ms to 131s * Single-supply 5V In-Circuit Serial ProgrammingTM (ICSPTM) via two pins * In-Circuit Debug (ICD) via two pins * Wide operating voltage range: 2.0V to 5.5V
Comparators EUSART MSSP External Bus N N Y Y
External Memory Interface (PIC18F8625/8721 only):
* Address capability of up to 2 Mbytes * 8-bit or 16-bit interface
Peripheral Highlights:
* * * * High current sink/source 25 mA/25 mA Four programmable external interrupts Four input change interrupts Two Capture/Compare/PWM (CCP) modules
Device
Flash (bytes) 96 K 128 K 96 K 128 K
# SingleSRAM EEPROM Word (bytes) (bytes) Instructions 49152 65536 49152 65536 3936 3936 3936 3936 1024 1024 1024 1024
I/O
10-bit A/D (ch) 12 12 16 16
CCP/ ECCP (PWM) 2/3 2/3 2/3 2/3 2 2 2 2
SPI Y Y Y Y
Master I2C Y Y Y Y
PIC18F6625 PIC18F6721 PIC18F8625 PIC18F8721
54 54 70 70
2 2 2 2
2 2 2 2
2004 Microchip Technology Inc.
DS39627A-page 1
www..com
Timers 8/16-bit 2/3 2/3 2/3 2/3
Program Memory
Data Memory
PIC18F6625/6721/8625/8721
Pin Diagrams
64-Pin TQFP
RE7/ECCP2(1)/P2A(1)
RD6/PSP6/SCK2/SCL2
RD5/PSP5/SDI2/SDA2
RD4/PSP4/SDO2
RE3/P3C
RE5/P1C
RE4/P3B
RE6/P1B
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 RE1/WR/P2C RE0/RD/P2D RG0/ECCP3/P3A RG1/TX2/CK2 RG2/RX2/DT2 RG3/CCP4/P3D RG5/MCLR/VPP RG4/CCP5/P1D VSS VDD RF7/SS1 RF6/AN11 RF5/AN10/CVREF RF4/AN9 RF3/AN8 RF2/AN7/C1OUT RB0/INT0 RB1/INT1 RB2/INT2 RB3/INT3 RB4/KBI0 RB5/KBI1/PGM RB6/KBI2/PGC VSS RA6/OSC2/CLKO RA7/OSC1/CLKI VDD RB7/KBI3/PGD RC5/SDO1 RC4/SDI1/SDA1 RC3/SCK1/SCL1 RC2/ECCP1/P1A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
RD7/PSP7/SS2 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 RC7/RX1/DT1
RE2/CS/P2B
RD0/PSP0
RD1/PSP1
RD2/PSP2
PIC18F6625 PIC18F6721
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
RA1/AN1
RA0/AN0
RF0/AN5
RD3/PSP3
VDD
VSS
RA4/T0CKI RC1/T1OSI/ECCP2(1)/P2A(1)
Note 1:
RB3 is the alternate pin for ECCP2/P2A multiplexing.
RC0/T1OSO/T13CKI
AVSS RA3/AN3/VREF+
RF1/AN6/C2OUT
RA5/AN4/LVDIN
RA2/AN2/VREF-
RC6/TX1/CK1
AVDD
VSS
VDD
DS39627A-page 2
2004 Microchip Technology Inc.
PIC18F6625/6721/8625/8721
Pin Diagrams (Continued)
80-Pin TQFP
RH2/A18 RH3/A19 RE1/AD9/WR/P2C RE0/AD8/RD/P2D RG0/ECCP3/P3A RG1/TX2/CK2 RG2/RX2/DT2 RG3/CCP4/P3D RG5/MCLR/VPP RG4/CCP5/P1D VSS VDD RF7/SS1 RF6/AN11 RF5/AN10/CVREF RF4/AN9 RF3/AN8 RF2/AN7/C1OUT RH7/AN15/P1B(2) RH6/AN14/P1C(2)
RH1/A17 RH0/A16 RE2/AD10/CS/P2B RE3/AD11/P3C(2) RE4/AD12/P3B(2)
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 RJ2/WRL RJ3/WRH RB0/INT0 RB1/INT1 RB2/INT2 RB3/INT3/ECCP2(1)/P2A(1) RB4/KBI0 RB5/KBI1/PGM RB6/KBI2/PGC VSS RA6/OSC2/CLKO RA7/OSC1/CLKI VDD RB7/KBI3/PGD RC5/SDO1 RC4/SDI1/SDA1 RC3/SCK1/SCL1 RC2/ECCP1/P1A RJ7/UB RJ6/LB
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
RF1/AN6/C2OUT RF0/AN5 AVDD AVSS RA3/AN3/VREF+ RA2/AN2/VREF-
Note 1: 2:
The ECCP2/P2A pin placement is determined by the CCP2MX configuration bit and Processor Mode settings. P1B, P1C, P3B and P3C pin placement is determined by the ECCPMX configuration bit.
2004 Microchip Technology Inc.
RA5/AN4/LVDIN RA4/T0CKI RC1/T1OSI/ECCP2(1)/P2A(1)
RC0/T1OSO/T13CKI RC6/TX1/CK1 RC7/RX1/DT1
RH5/AN13/P3B(2) RH4/AN12/P3C(2)
RA1/AN1 RA0/AN0 VSS VDD
RJ4/BA0 RJ5/CE
RE5/AD13/P1C(2) RE6/AD14/P1B(2) RE7/AD15/ECCP2(1)/P2A(1) RD0/AD0/PSP0 VDD VSS RD1/AD1/PSP1 RD2/AD2/PSP2 RD3/AD3/PSP3 RD4/AD4/PSP4/SDO2 RD5/AD5/PSP5/SDI2/SDA2 RD6/AD6/PSP6/SCK2/SCL2 RD7/AD7/PSP7/SS2 RJ0/ALE RJ1/OE
PIC18F8625 PIC18F8721
DS39627A-page 3
PIC18F6625/6721/8625/8721
NOTES:
DS39627A-page 4
2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartShunt and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2004, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
DS39627A-page 5
2004 Microchip Technology Inc.
Worldwide Sales and Service
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ASIA/PACIFIC
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01/26/04
DS39627A-page 6
2004 Microchip Technology Inc.

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